The 30th International Workshop on Logic & Synthesis (IWLS'2021)

July 19 – 21, 2021, Virtual Conference

Submission Guidelines

The International Workshop on Logic and Synthesis is the premier forum for research in synthesis, optimization, and verification of integrated circuits and systems. Research on logic synthesis for emerging technologies and for novel computing platforms, such as nanoscale systems and biological systems, is also strongly encouraged. The workshop encourages early dissemination of ideas and results. The workshop accepts complete papers highlighting important new problems in the early stages of development, without providing complete solutions. The emphasis is on novelty and intellectual rigor.

Topics of interest include but are not limited to: hardware synthesis and optimization; software synthesis; hardware/software co-synthesis; power and timing analysis; testing, validation and verification; synthesis for reconfigurable architectures; hardware compilation for domain-specific languages; and design experiences. Submissions on modeling, analysis and synthesis for emerging technologies and platforms are particularly encouraged.

Only complete papers with original and previously unpublished material are permitted. Submissions must be no longer than 8 pages, double column, 10-point font. Accepted papers are distributed only to IWLS participants. The workshop format includes paper presentations, posters, invited talks, social lunch and dinner gatherings, and recreational activities. Submissions are made electronically through EasyChair. Please see the workshop website for instructions:

List of Topics

Topics of interest include but are not limited to: hardware synthesis and optimization; software synthesis; hardware/software co-synthesis; power and timing analysis; testing, validation and verification; synthesis for reconfigurable architectures; hardware compilation for domain-specific languages; and design experiences. Submissions on modeling, analysis and synthesis for emerging technologies and platforms are particularly encouraged.

Committees

Organizing committee

• General Chair: Vinicius Callegaro, Siemens EDA

• Program Chairs: Cunxi Yu, University of Utah; Gai Liu, Xilinx

• Special Session Chair: Luca Amaru, Synopsys

• Programming Contest Chairs Satrajit Chatterjee, Google; Alan Mishchenko, University of California Berkeley

• Proceedings Chair Zhufei Chu, Ningbo University

• Finance Chair Jody Mattos, Silvaco

• Publicity Chair Eleonora Testa, Synopsys

• Virtual Chairs Augusto Neutzling, Cadence; Walter Lau Neto, University of Utah

Deadlines

Paper abstract submission   April 19, 2021

Submission deadline for papers   April 26, 2021

Notification of acceptance   June 18, 2021

Final version due   June 30, 2021