Submission Guidelines

Submissions must not substantially duplicate work that any of the authors have published
elsewhere or that has been  submitted in parallel to any other conference or workshop.
Submissions should be anonymous, with no author names,  affiliations, acknowledgments,
or obvious references. Papers should be up to 12 pages (including the bibliography and
appendices) and must be formatted following the instructions in the provided template.

FDTC also encourages the submission of short papers which will also be subject
to peer review; however, the intention is to encourage authors to introduce work in progress,
novel applications, and corporate/industrial experiences. Short papers will be evaluated
with a focus on novelty and potential for sparking the interest of the participants
and future research avenues. Short paper submissions are limited to 6 pages formatted
following the instructions in the provided template. The paper title for short papers
must include the text "Short Paper:". Accepted submissions will be included
in the conference proceedings. 

The submission of final papers will be managed directly by Conference Publishing Services
(CPS). CPS will contact the authors with instructions and will send links for uploading
the manuscripts.

Accepted papers will be published in an archival proceedings volume by CPS and will be
distributed at the time of the workshop.

At least one author of each accepted paper must register for the workshop and present
the paper in order to be included in the proceedings. Additional submission instructions
and further information on the FDTC workshop series can be found at:

   http://fdtc-workshop.eu

List of Topics

- Fault injection setups and praxis:
  - novel and improved mechanisms for fault injection, e.g., by using
    lasers, electromagnetic induction, or clock / power supply manipulation
  - practical issues in fault injection setups and validation results
  - practical limitations of attacks and implications for security
  - fault injection in emerging technologies, e.g., memristor, carbon nanotubes, etc.

- Case studies:
  - attacks on cryptographic implementations including post-quantum cryptography
    and lightweight cryptography
  - attacks on embedded devices like mobile phones, industrial control devices,
    hardware wallets for cryptocurrencies, security tokens, smartcards, TEEs,
    secure enclaves, etc.
  - attacks on machine learning architectures and validation of results
  - attacks on privacy-preserving technologies, e.g., homomorphic encryption,
    zero-knowledge proofs, multi-party computation
  - attacks on remote targets, e.g., fpgas in the cloud
  
- Related highly-invasive attacks on device security:
  - setups and practical results from invasive attacks, such as photonic
    emission analysis, laser thermal imaging, laser-voltage imaging, etc.
  - practical issues, limitations and potential

- Countermeasures (detection, resistance and tolerance):
  - countermeasures for cryptographic implementations
  - countermeasures for firmware of embedded devices, e.g., for bootloaders
  - detection countermeasures, e.g., control flow integrity
  - HW/SW co-design countermeasures for CPU architectures

- Design tools for analysis of fault attacks and countermeasures:
  - early estimation of fault attack robustness
  - automatic applications of fault countermeasures
  - formal methods and techniques for the verification of fault resiliency

Committees

Program Chairs

      Fabrizio    De Santis            Siemens AG, DE
      Francesco   Regazzoni            University of Amsterdam, NL - UNISI, Lugano, CH

Program Committee

      Diego       Aranha               Aarhus University, DK
      Aydin       Aysu                 NC State University, US
      Melissa     Azouaoui             NXP, DE
      Josep       Balasch              Katholieke Universiteit Leuven, BE
      Alessandro  Barenghi             Politecnico di Milano, IT
      Sven        Bauer                Siemens AG, DE
      Davide      Bellizia             Telsy, IT
      Sarani      Bhattacharya         IIT Kharagpur, IN
      Shivam      Bhasin               NTU, SG
      Guillaume   Bouffard             ANSSI, FR
      Jakub       Breier               Silicon Austria Labs, AT
      Ileana      Buhan                Radboud University, NL
      Jean-Max    Dutertre             Ecole des Mines de Saint-Etienne, FR
      Wieland     Fischer              Infineon Technologies, DE
      Fatemah     Ganji                Worcester Polytechnic Institute, US
      Christophe  Giraud               IDEMIA, FR
      Osnat       Keren                Bar-Ilan University, IL
      Juliane     Krämer               University of Regensburg, DE
      Victor      Lomné                NinjaLab, FR
      Soundes     Marzougui            STM, BE
      Mehran      Mozaffari Kermani    University of South Florida, US
      David       Oswald               The University of Birmingham, UK
      Gerardo     Pelosi               Politecnico di Milano, IT
      Stjepan     Picek                Radboud University, NL
      Chester     Rebeiro              IIT Madras, IN
      Sayandeep   Saha                 IIT Bombay, IN
      Pascal      Sasdrich             Ruhr University Bochum, DE
      Georg       Sigl                 Technische Universitaet Muenchen, DE
      Sergei      Skorobogatov         University of Cambridge, UK
      Marc        Stöttinger           RheinMain University of Applied Science, DE
      Takeshi     Sugawara             The University of Electro-Communications, JP
      Shahin      Tajik                Worcester Polytechnic Institute, US
      Junko       Takahashi            NTT, JP
      Rei         Ueno                 Kyoto University, JP
      Praveen     Vadnala              Riscure, NL
      Fan         Zhang                Zhejiang University, CN

Organizing committee

      Michael Tunstall                 Google, US
      Luca Breveglieri                 Politecnico di Milano, IT
      Israel Koren                     University of Massachusetts, US
      Guido Marco Bertoni              Security Pattern, IT

Publication

FDTC 2024 proceedings will be published by Conference Publishing Services

Venue

The conference will be held in Halifax, Nova Scotia, Canada, in onsite mode, on Wed, 4 Sept. 2024

Contact

Michael Tunstall - Google - mtunstall@google.com  -  see also: www.fdtc-workshop.eu