FDTC 2022: Workshop on Fault Diagnosis and Tolerance in Cryptography 2022 virtual workshop September 16, 2022 |
| Conference website | https://fdtc.deib.polimi.it/FDTC22/index.html |
| Submission link | https://easychair.org/conferences/?conf=fdtc2022 |
About FDTC 2022
FDTC 2022 – Nineteenth Workshop on Fault Diagnosis and Tolerance in Cryptography
Sept. 16 (final), 2022, Virtual Workshop (co-located with CHES 2022)
FDTC 2022 is held in cooperation with IACR.
Fault injection is one of the most exploited means for extracting confidential informationfrom embedded devices
and for compromising their intended operation. Therefore, research on established as well as upcoming methodologies,
and techniques for fault injection, architectures and design tools for the design of robust and protected cryptographic
systems and embedded devices (both hardware and software), are essential. Fault injection case studies on popular categories
of embedded devices like mobile phones, industrial control devices, hardware wallets for cryptocurrencies, security tokens,
etc., are of high interest to improve the understanding of the implications on realistic applications. FDTC is the reference
event in the field of fault injection appliances, fault attacks and countermeasures.
Website: fdtc-workshop.eu
Submission Guidelines
All the papers must be original and not simultaneously submitted to another journal or conference. The following paper categories are welcome:
- Full papers of max 12 pages
- Short papers of max 6 pages
Please submit a manuscript (full paper), preferably in PDF format. The paper title for short papers must include the text "Short Paper:". Preferably format the sumbitted manuscript using the author kit indicated in proceedings page (in the due time). If the submission is accepted, this format will also be the one for the final paper (max 12 pages - no extra pages). The manuscript must be anonymous; do not include any information that may identify the authors. Author, affiliation and contact information must be specified separately by filling the submission form provided by the EasyChair system. Please take particular care that author, affiliation and contact information is correct, especially the contact name and address as these are used for subsequent communication. It is permitted to modify or withdraw the submission by the paper submission deadline. Please keep trace of the submission ID that EasyChair assigns to your manuscript, as you will need it if you want to modify or withdraw your submission later. The papers accepted at FDTC will be published by CPS and will be available at the workshop (online). At least one author of each accepted paper must register for the workshop and present the paper in order to be included in the proceedings. Additional submission instructions and further information on the FDTC workshop series can be found at: fdtc-workshop.eu.
List of Topics
- Fault injection setups and praxis:
- novel and improved mechanisms for fault injection, e.g., using
lasers, electromagnetic induction, or clock / power supply manipulation
- practical issues in fault injection setups and validation results
- practical limitations of attacks and implications for security
- Case studies:
- attacks on cryptographic implementations
- attacks on embedded devices like mobile phones, industrial control devices,
hardware wallets for cryptocurrencies, security tokens, smartcards, etc.
- Attacks on Machine Learning architectures
- validation of earlier results
- Related highly-invasive attacks on device security:
- setups and practical results from invasive attacks, such as photonic
emission analysis, laser thermal imaging, laser-voltage imaging, etc.
- practical issues, limitations and potential
- Countermeasures (detection, resistance and tolerance):
- countermeasures for cryptographic implementations
- countermeasures for firmware of embedded devices, e.g., for bootloaders
- detection countermeasures, e.g., control flow integrity
- HW/SW co-design countermeasures for CPU architectures
- Design tools for analysis of fault attacks and countermeasures:
- early estimation of fault attack robustness
- automatic applications of fault countermeasures
Committees
Program Committee
Shivam Bhasin Nanyang Tech. University (chair) Praveen Kumar Vadnala Riscure (chair) Nasour Bagheri Shahid Rajaee University Josep Balasch Katholieke Universiteit Leuven Sarani Bhattacharya IMEC Guillaume Bouffard ANSSI Jakub Breier Silicon Austria Labs Ileana Buhan Radboud University Lukasz Chmielewski Radboud University Jean-Max Dutertre Ecole des Mines de Saint-Etienne Nahid Farhady-Ghalaty Google Wieland Fischer Infineon Technologies Christophe Giraud IDEMIA Hannes Gross SGS Jorge Guajardo Merchan Robert Bosch LLC Osnat Keren Bar-Ilan University Victor Lomne NinjaLab Alyssa Milburn Intel Mehran Mozaffari Kermani University of South Florida Debdeep Mukhopadhyay IIT Kharagpur Cristofaro Mune Raelize Colin O'Flynn NewAE Technology David Oswald The University of Birmingham Ramiro Pareja Riscure Gerardo Pelosi Politecnico di Milano Stjepan Picek Delft University of Technology Ilia Polian University of Stuttgart Robert Primas TU Graz Chester Rebeiro IIT Madras Sayandeep Saha Nanyang Technological University Falk Schellenberg Max Planck Institute for Cybersecurity and Privacy Sergei Skorobogatov University of Cambridge Takeshi Sugawara The University of Electro-Communications Shahin Tajik Worcester Polytechnic Institute Junko Takahashi NTT Fan Zhang Zhejiang University
Organizing committee
Chairs (general, publication, finance, sponsorship):
Michael Tunstall Cryptography Research
Luca Breveglieri Politecnico di Milano
Israel Koren University of Massachusetts
Guido Marco Bertoni Security Pattern
Steering committee:
Luca Breveglieri Politecnico di Milano
Israel Koren University of Massachusetts
David Naccache (chair) ENS de Paris
Jean-Pierre Seifert TU Berlin & T-Labs
Publication
FDTC 2022 proceedings will be published by Conference Publishing Services.
Venue
FDTC 2022 takes place as a Virtual Workshop on Fri. Sept. 16 (final), 2022.
Contact
Michael Tunstall - Rambus Cryptography Research – USA 425 Market Str., Floor 11, San Francisco, CA 94105, mtunstall@rambus.com